Part Number Hot Search : 
A2730 CMHZ4117 1SMB50CA FX651 FX651 NF100 D221K CVA2407T
Product Description
Full Text Search
 

To Download MAX3930 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 19-1856; Rev 3; 3/02
KIT ATION EVALU ABLE AVAIL
10.7Gbps Laser Diode Drivers
General Description Features
o o o o o o o o o o o Single +5V or -5.2V Power Supply 108mA Supply Current Operates to 10.7Gbps 50 On-Chip Input Termination Resistors Programmable Modulation Current to 100mA Programmable Laser Bias Current to 100mA 25ps Rise Time (MAX3930/MAX3932) Adjustable Pulse-Width Control Selectable Data Retiming Latch ESD Protection Internal Series Damping Resistor (MAX3931)
MAX3930/MAX3931/MAX3932
The MAX3930/MAX3931/MAX3932 are designed for direct modulation of laser diodes at data rates up to 10.7Gbps. They provide adjustable laser bias and modulation currents and are implemented using Maxim's second-generation in-house SiGe process. The MAX3930 accepts differential CML clock and data input signals and includes 50 on-chip termination resistors. It delivers a 1mA to 100mA laser bias current and a 20mA to 100mA modulation current with a typical (20% to 80%) 25ps rise time. An input data retiming latch can be used to reject input pattern-dependent jitter if a clock signal is available. The MAX3931/MAX3932 have an alternate pad out with respect to the MAX3930. The MAX3931 includes the series damping resistor RD on chip. The MAX3930/MAX3931/MAX3932 also include an adjustable pulse-width control circuit to minimize laser pulse-width distortion.
Ordering Information
PART MAX3930E/D MAX3931E/D MAX3932E/D MAX3932E/W TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE Dice Dice Dice Wafer
________________________Applications
SONET OC-192 and SDH STM-64 Transmission Systems Up to 10.7Gbps Optical Transmitters Section Regenerators
Note: Dice are designed to operate over a -40C to +120C junction temperature (TJ) range but are tested and guaranteed at TA = +25C.
Typical Application Circuit
5V VBIAS 5V 5V 0.01F BIASMON BIASSET DATA+ DATA50 50 5V DATA+ DATAVCC MODN1 MOD1 VTT 50 50 CLK+ CLKPWC+ RTEN PWCMOD2 MODN2 MODMON MODSET BIAS VEE MODEN LB 20 5V RD = 15
MAX3910
10Gbps CLK+ SERIALIZER CLK-
MAX3930
5V
5V 2k
REPRESENTS A CONTROLLED- IMPEDANCE TRANSMISSION LINE
VMOD
Covered by U.S. Patent number 5,883,910.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC - VEE) ..................................-0.5V to +6.0V DATA+, DATA-, CLK+, CLK- ................................................(VTT - 1.2V) to the lower of (VTT + 1.2V) or (VCC + 0.5V) MODEN, RTEN, VTT, BIASMON, MODMON, PWC+, and PWC- .........................(VEE - 0.5V) to (VCC + 0.5V) MODN1, MODN2 ............................(VCC - 0.5V) to (VCC + 0.5V) BIAS, MOD1, MOD2 ...........................(VEE + 1V) to (VEE + 1.5V) MODSET and BIASSET ....................(VEE - 0.5V) to (VEE + 1.5V) Storage Temperature Range .............................-55C to +150C Operating Junction Temperature ......................-55C to +150C Processing Temperature (die) .........................................+400C Current into DATA+, DATA-, CLK+, CLK- (VTT = VCC)........................................-24mA to +30.5mA Current into DATA+, DATA-, CLK+, CLK- (VTT = VCC - 1.3V) ................................-24mA to +24mA
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS--MAX3930
(VCC - VEE = 4.75V to 5.5V, TA = -40C to +85C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25C, unless otherwise noted.)
PARAMETER Power-Supply Voltage Power-Supply Current Single-Ended Input Resistance Bias Current-Setting Range Bias Current-Setting Error Bias Sensing Resistor Bias Current Temperature Stability Bias Off-Current MODEN and RTEN Input High MODEN and RTEN Input Low Power-Supply Rejection Ratio SIGNAL INPUT FOR VTT = VCC At high Single-Ended Input (DC-Coupled) VIS At low At high Single-Ended Input (AC-Coupled) VIS At low Differential Input Swing (DC-Coupled) Differential Input Swing (AC-Coupled) VID VID VCC - 1 VCC + 0.075 VCC 0.4 0.3 0.3 VCC VCC 0.15 VCC + 0.4 V VCC 0.075 2.0 1.6 VP-P VP-P V VIH VIL PSRR VCC = 4.75V to 5.5V (Note 2) 39.5 60 RBIAS IBIAS = 100mA (Note 1) IBIAS = 1mA (Note 1) BIASSET (VEE + 0.4V) VEE + 2 VEE + 0.8 Bias current = 100mA, TA = +25C Bias current = 1mA, TA = +25C SYMBOL VCC - VEE ICC Excluding bias current and modulation current 42.5 1 -5 -10 2.7 -480 -200 0.05 3 CONDITIONS MIN 4.75 TYP 5 108 50 MAX 5.50 140 57.5 100 +5 +10 3.3 +480 UNITS V mA mA % ppm/C mA V V dB
SIGNAL INPUT FOR VTT = (VCC - 1.3V) Input Common Mode VICM VCC 1.3 V
2
_______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
DC ELECTRICAL CHARACTERISTICS--MAX3930 (continued)
(VCC - VEE = 4.75V to 5.5V, TA = -40C to +85C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25C, unless otherwise noted.)
PARAMETER SYMBOL At high Single-Ended Input VIS At low Differential Input Swing VID CONDITIONS MIN VCC 1.225 VCC 1.8 0.3 TYP MAX VCC 0.8 V VCC 1.375 2.0 VP-P UNITS
MAX3930/MAX3931/MAX3932
DC ELECTRICAL CHARACTERISTICS--MAX3931/MAX3932
(VCC - VEE = 4.75V to 5.5V, TA = -40C to +85C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25C, unless otherwise noted.)
PARAMETER Power-Supply Voltage Power-Supply Current Single-Ended Input Resistance Bias Current Setting Range Bias Current Setting Error Bias Sensing Resistor Bias Current Temperature Stability Bias Off-Current MODEN and RTEN Input High MODEN and RTEN Input Low Power-Supply Rejection Ratio SIGNAL INPUT At high Single-Ended Input (DC-Coupled) VIS At low At high Single-Ended Input (AC-Coupled) VIS At low Differential Input Swing (DC-Coupled) Differential Input Swing (AC-Coupled) VID VID VCC - 1 VCC + 0.075 VCC 0.4 0.3 0.3 VCC VCC 0.15 VCC + 0.4 V VCC 0.075 2.0 1.6 VP-P VP-P V VIH VIL PSRR VCC = 4.75V to 5.5V (Note 3) 39.5 60 RBIAS IBIAS = 100mA (Note 1) IBIAS = 1mA BIASSET (VEE + 0.4V) VEE + 2 VEE + 0.8 Bias current = 100mA, TA = +25C Bias current = 1mA, TA = +25C SYMBOL VCC - VEE ICC Excluding bias current and modulation current 42.5 1 -5 -10 2.7 -480 -200 0.05 3 CONDITIONS MIN 4.75 TYP 5 108 50 MAX 5.50 140 57.5 100 +5 +10 3.3 +480 UNITS V mA mA % ppm/C mA V V dB
_______________________________________________________________________________________
3
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
AC ELECTRICAL CHARACTERISTICS--MAX3930/MAX3932
(VCC - VEE = 4.75V to 5.5V, VTT = VCC, TA = -40C to +85C. Typical values are at VCC - VEE = 5V, IMOD = 70mA, and TA = +25C, unless otherwise noted.) (Note 3)
PARAMETER Input Data Rates Modulation Current Setting Range Modulation Current Setting Error Modulation Sensing Resistor Modulation Current Temperature Stability Modulation Off-Current Output Current Rise Time Output Current Fall Time Setup/Hold Time Pulse-Width Adjustment Range Pulse-Width Stability Pulse-Width Control Input Range Overshoot Driver Random Jitter Driver Deterministic Jitter Input Return Loss (Note 5) tR tF tSU, tHD MODSET (VEE + 0.4V) ZL = 20, 20% to 80% (Note 4) ZL = 20, 20% to 80% (Note 4) Figure 2 (Note 4) PWC+ and PWC- open (Note 4) For PWC+ and PWC (Note 4) 0.75 6.7 12 VEE + 0 VEE+ 1 25 25 55 13 VEE+ 2 13 1 21 25 29 RMOD 20 load, TA = +25C SYMBOL NRZ 20 -5 2.7 -480 3 CONDITIONS MIN TYP 10.7 MAX 100 +5 3.3 +480 0.1 35 36 UNITS Gbps mA % ppm/C mA ps ps ps ps ps V % psRMS psP-P dB
AC ELECTRICAL CHARACTERISTICS--MAX3931
(VCC - VEE = 4.75V to 5.5V, VTT = VCC, TA = -40C to +85C. Typical values are at VCC - VEE = 5V, IMOD = 70mA, and TA = +25C, unless otherwise noted.) (Note 3)
PARAMETER Input Data Rates Modulation Current Setting Range Modulation Current Setting Error Modulation Sensing Resistor Output Series Resistance Modulation Current Temperature Stability Modulation Off-Current Setup/Hold Time Pulse-Width Adjustment Range Pulse-Width Stability Pulse-Width Control Input Range Input Return Loss tSU, tHD MODSET (VEE + 0.4V) Figure 2 (Note 4) PWC+ and PWC- open (Note 4) For PWC+ and PWCVEE + 0 VEE + 1 12 25 25 55 13 VEE + 2 RMOD RMOD1 in parallel with RMOD2 20 load, TA = +25C SYMBOL NRZ 20 -5 2.7 12.75 -480 3 15 CONDITIONS MIN TYP 10.7 100 +5 3.3 17.25 +480 0.1 MAX UNITS Gbps mA % ppm/C mA ps ps ps V dB
Note 1: Guaranteed by design and characterization. Note 2: PSRR = 20 x log (VCC/( IMOD 20)). IMOD = 100mA Note 3: Guaranteed by design and characterization using the circuit shown in Figure 1. Note 4: Measured using a 10.7Gbps repeating 0000 0000 1111 1111 pattern. Note 5: Measured using a 10.7Gbps 213 - 1 PRBS with eighty 0s pattern. 4 _______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
Typical Operating Characteristics
(VCC = 5V, TA = +25C, unless otherwise noted.)
ELECTRICAL EYE DIAGRAM (IMOD = 100mA, 213 - 1 + 80 CID)
MAX3930 toc01
MAX3930/MAX3931/MAX3932
MAX3930/MAX3932
ELECTRICAL EYE DIAGRAM (IMOD = 20mA, 213 - 1 + 80 CID)
MAX3930 toc02
SUPPLY CURRENT vs. TEMPERATURE (EXCLUDES BIAS AND MODULATION CURRENTS)
112 111 SUPPLY CURRENT (mA) 110 109 108 107 106 105 104 103
MAX3930 toc03
113
14ps/div
14ps/div
-40
-15
10
35
60
85
PULSE-WIDTH DISTORTION vs. TEMPERATURE
MAX3930 toc04
TEMPERATURE (C)
TYPICAL DISTRIBUTION OF RISE TIME
MAX3930 toc05
TYPICAL DISTRIBUTION OF FALL TIME
MAX3930 toc06
2.0 1.8 PULSE-WIDTH DISTORTION (ps) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 -15 10 35 60 IMOD = 100mA IMOD = 20mA
10
10
8 PERCENT OF UNITS (%)
8 PERCENT OF UNITS (%)
6
6
4
4
2
2
0 85 22 23 24 25 26 27 28 29 30 TEMPERATURE (C) RISE TIME (ps)
0 25 26 27 28 29 30 31 32 33 FALL TIME (ps)
PULSE WIDTH vs. RPWC
MAX3930 toc07
MAX3930 toc08
PULSE-WIDTH OF NEGATIVE PULSE (ps)
PULSE-WIDTH OF POSITIVE PULSE (ps)
120 110 100 90 80 70 60 50 40 30
67 77 87 97
90 80 70 IMOD (mA) 60 50 40 30 20 10 0
107 117 127 137 147 157 0 200 400 600 800 1000 1200 1400 1600 1800 2000 RPWC- ()
OPTICAL EYE DIAGRAM COURTESY OF NETWORK ELEMENTS, INC. COPYRIGHT(c)2000 BY NETWORK ELEMENTS, INC. ALL RIGHTS RESERVED.
0
0.1 VMOD (V)
0.2
0.3
_______________________________________________________________________________________
MAX3930 toc09
RPWC+ () 2000 1800 1600 1400 1200 1000 800 600 400 200 0 130 57
OC-192 OPTICAL EYE DIAGRAM (IMOD = 70mAP-P, IBIAS = 15mA, PAVG = -2dBm)
100
IMOD vs. VMOD
5
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
Typical Operating Characteristics (continued)
(VCC = 5V, TA = +25C, unless otherwise noted.)
MAX3930/MAX3932
IBIAS vs. VBIAS
90 80 70 IBIAS (mA) 60 50 40 30 20 10 0 0 0.1 0.2 VBIAS (V) 0.3
MAX3930 toc10
DIFFERENTIAL S11 vs. FREQUENCY
-5 -10 MAGNITUDE S11 (dB) -15 -20 -25 -30 -35 -40 -45 -50 0 5 10 FREQUENCY (GHz) 15 20
MAX3930 toc07
100
0
6
_______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
Pad Description
PAD MAX3930 1, 5, 9, 12, 22, 23, 28, 29 2 3 4 6 7 8 10, 11, 17, 18, 21, 32, 35, 36, 37 13 14 15 16 19 20 24, 27 25, 26 30 31 33 34 MAX3931/ MAX3932 1, 3, 5, 7, 9, 10, 12, 22, 23, 28, 29 2 -- 4 6 -- 8 11, 17, 18, 19, 32, 35, 36, 37 13 14 15 16 20 21 24, 27 25, 26 30 31 33 34 NAME FUNCTION
MAX3930/MAX3931/MAX3932
VCC
Power-Supply Voltage (VCC - VEE = 5V). All pads must be connected to VCC.
DATA+ VTT DATACLK+ VTT CLKVEE
Noninverting Data Input. CML with on-chip termination resistor. Terminating Voltage for Data Inputs Inverting Data Input. CML with on-chip termination resistor. Noninverting Clock Input for Data Retiming. CML with on-chip termination resistor. Terminating Voltage for Clock Inputs Inverting Clock Input for Data Retiming. CML with on-chip termination resistor. Power-Supply Voltage (VCC - VEE = 5V) TTL/CMOS Data Retiming Input. Low for latched data, high for direct data. Internal 100k pullup to VCC. Positive Input for Modulation Pulse-Width Adjustment. Connected to ground through RPWC. Negative Input for Modulation Pulse-Width Adjustment. Connected to ground through RPWC. TTL/CMOS Modulation Enable Input. Low for normal operation, high to switch modulation output off. Internal 100k pullup to VCC. Modulation Current Monitor (VMODMON - VEE) / RMOD = IMOD Modulation Current Set. Connected to the output of the external operational amplifier (see the Design Procedure section). Complementary Laser Modulation Current Outputs. Connect to VCC. Laser Modulation Current Outputs Laser Bias Current Output No Connection. Leave unconnected. Bias Current Set. Connected to the output of the external operational amplifier (see the Design Procedure section). Bias Current Monitor (VBIASMON - VEE) / RBIAS = IBIAS
RTEN PWC+ PWCMODEN MODMON MODSET MODN2, MODN1 MOD2, MOD1 BIAS N.C. BIASSET BIASMON
_______________________________________________________________________________________
7
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
EQUIVALENT CIRCUIT DATA+ DATAPATTERN GENERATOR CLK+ CLK50 50 50 50 DATA+ DATAVTT IOUT MOD1 50 33 VOUT VCC MODN1
+ -
1.2V 20
OSCILLOSCOPE
CLK+ CLKRTEN
MAX3930/ MAX3932
MOD2 MODN2 -2V
50
VEE -5V
MODEN -5V
-5V
Figure 1. Test Circuit
CLK+ VIS = 0.15V - 1.0V CLK-
tSU DATA-
tHD
VIS = 0.15V - 1.0V DATA+
(DATA+) - (DATA-)
VID = 0.3V - 2.0V
20mA - 100mA IOUT
Figure 2. Required Input Signal, Setup/Hold Time Definition, and Output Polarity
8
_______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
Detailed Description
The MAX3930 laser driver consists of two main parts, a high-speed modulation driver and a laser-biasing block. The circuit operates from a single 5V or -5.2V supply. When operating from a 5V supply, connect all VCC pins to 5V and all VEE pins to ground. If operating from a -5.2V supply, connect all VEE pins to -5.2V and all VCC pins to ground. To eliminate pattern-dependent jitter on the input data signal, the device accepts a differential CML clock signal for data retiming. When RTEN is tied to a low potential, the input data is synchronized by the clock signal. When RTEN is tied high or left floating, the input data is transmitted directly to the output stage (retiming is disabled). The output stage is composed of a high-speed differential pair and a programmable modulation current source with a maximum modulation current of 100mA. The rise and fall times are typically 25ps and 29ps, respectively. The MAX3930/MAX3932 modulation output is optimized for driving a 20 load. The minimum voltage required at MOD is 1.55V. To interface with a laser diode, a series damping resistor (RD) is required for impedance matching (RD = 15, assuming a laser resistance of 5; see Typical Application Circuit). The MAX3931 output has an internal series damping resistor consisting of two parallel 30 resistors in series with the output. This simplifies interfacing with the laser diode. The MAX3931/MAX3932 have an alternate pad out with respect to MAX3930. At the 10.7Gbps data rate, any capacitive load at the cathode of a laser diode will degrade the optical output performance. Since the BIAS output is directly connected to the laser cathode, minimize the parasitic capacitance associated with this pad by using a ferrite bead (LB) to isolate the BIAS pin from the laser cathode. are disabled. The typical laser enable time is 2ns, and the typical disable time is 5ns.
MAX3930/MAX3931/MAX3932
Pulse-Width Control
The pulse-width control circuit can be used to precompensate for laser pulse-width distortion. The differential voltage between PWC+ and PWC- adjusts the pulsewidth compensation. When PWC+ and PWC- are left open, the pulse-width control circuit is automatically disabled.
Current Monitors
The MAX3930/MAX3931/MAX3932 feature a bias current monitor output (BIASMON) and a modulation current monitor output (MODMON). The voltage at BIASMON is equal to (IBIAS RBIAS) + VEE, and the voltage at MODMON is equal to (IMOD RMOD) + VEE, where IBIAS represents the laser bias current, IMOD represents the modulation current, and R BIAS and RMOD are internal 3 (10%) resistors. BIASMON and MODMON should be connected to the inverting input of an operational amplifier to program the bias and modulation current (see Design Procedure).
Design Procedure
When designing a laser transmitter, the optical output is usually expressed in terms of average power and extinction ratio. Table 1 gives relationships that are helpful in converting between the optical average power and the modulation current. These relationships are valid if the mark density and duty cycle of the optical waveform are 50%.
Programming the Modulation Current
For a desired laser average optical power, PAVG, and optical extinction ratio, re, the required modulation current can be calculated based on the laser slope efficiency, , using the equations in Table 1. To program the desired modulation current, connect the inverting input of an operational amplifier (such as the MAX480) to MODMON and connect the output to MODSET. Connect the positive op amp voltage supply to VCC and the negative supply to VEE (for 5V operation, VCC = 5V and VEE = ground; for -5.2V operation, VCC = ground and VEE = -5.2V). The modulation current is set by connecting a reference voltage, VMOD, to the noninverting input of the operational amplifier. Refer to the IMOD vs. VMOD graph in the Typical Operating Characteristics to select the value of VMOD that corresponds to the required modulation current.
Optional Input Data Retiming
To eliminate pattern-dependent jitter on the input data, a synchronous differential clock signal should be connected to the CLK+ and CLK- inputs, and the RTEN control input should be tied low. The input data is retimed on the rising edge of CLK+. If RTEN is tied high or left floating, the retiming function is disabled, and the input data is directly connected to the output stage. Leave CLK+ and CLK- open when retiming is disabled.
Modulation Output Enable
The MAX3930/MAX3931/MAX3932 incorporate a modulation current enable input. When MODEN is low, the modulation outputs (MOD1, MOD2) are enabled. When MODEN is high, the modulation outputs (MOD1, MOD2)
_______________________________________________________________________________________
9
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
Table 1. Optical Power Relations
PARAMETER Average Power Extinction Ratio Optical Power of a "1" Optical Power of a "0" Optical Amplitude Laser Slope Efficiency Modulation Current SYMBOL PAVG re P1 P0 PP-P IMOD RELATION PAVG = (P0 + P1) / 2 re = P1 / P0 P1 = 2PAVG re / (re + 1) P0 = 2PAVG / (re + 1) PP-P = P1 - P0 = 2PAVG(re - 1) / (re + 1) = PP-P / IMOD IMOD = PP-P /
Note: Assuming a 50% average input duty cycle and mark density.
To minimize optical output aberrations caused by signal reflections at the electrical interface to the laser diode, a series damping resistor (R D ) is required (Figure 4). The MAX3930/MAX3932 modulation outputs are optimized for a 20 load; therefore, the series combination of RD and RL (where RL represents the laser diode resistance) should equal 20. Typical values for RD are 13 to 17. The MAX3931 includes an on-chip series damping resistor RD at 15 (Figure 5). For best performance, a bypass capacitor (C), typically 0.01F, should be placed as close as possible to the anode of the laser diode. In some applications (depending on the laser diode parasitic inductance), an RF matching network at the laser cathode will improve the optical output.
Applications Information
OPTICAL POWER P1
Wire Bonding Die
For high current density and reliable operation, the MAX3930/MAX3931/MAX3932 use gold metalization. Make connections to the die with gold wire only, using ball-bonding techniques. Do not use wedge bonding. Die-pad size is 3.0mil (76m) and 4.5mil (114m). Die thickness is 8mil (203m). Die size is 46mil x 82mil (1.168mm x 2.083mm).
PAVG
Layout Considerations
P0 TIME
Figure 3. Optical Power Relations
Programming the Bias Current
To program the desired laser bias current, connect the inverting input of an operational amplifier (such as the MAX480) to BIASMON, and connect the output to BIASSET. Connect the positive op amp voltage supply to VCC and the negative supply to VEE (for 5V operation, VCC = 5V and VEE = ground; and for -5.2V operation, VCC = ground and VEE = -5.2V). The laser bias current is set by connecting a reference voltage, VBIAS, to the noninverting input of the operational amplifier. Refer to the I BIAS vs. V BIAS graph in the Typical Operating Characteristics to select the value of VBIAS that corresponds to the required laser bias current.
To minimize inductance, keep the connections between the driver output and the laser diode as short as possible. Optimize the laser diode performance by placing a bypass capacitor as close as possible to the laser anode. Use good high-frequency layout techniques and multilayer boards with an uninterrupted ground plane to minimize EMI and crosstalk. Use controlled impedance lines for the clock and data inputs.
Laser Safety and IEC 825
Using the MAX3930/MAX3931/MAX3932 laser driver alone does not ensure that a transmitter design is compliant with IEC 825. The entire transmitter circuit and component selections must be considered. Customers must determine the level of fault tolerance required by their application, recognizing that Maxim products are not designed or authorized for use as components in systems intended for surgical implant into the body, for applications intended to support or sustain life, or for any other application where the failure of a Maxim product could create a situation where personal injury or death may occur.
Interfacing with Laser Diodes
Refer to Maxim Application Note HFAN-2.0, Interfacing Maxim Laser Drivers with Laser Diodes, for detailed information.
10
______________________________________________________________________________________
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
VCC VTT* RTEN MODEN
MODN1
MODN2
MAX3930/MAX3932
50 CLK+ CLKMOD1 D DATA+ DATA1 LB 50 VTT* 50 Q 0 M U X PWC MOD2 20 IOUT 50 40 40 0.01F
5V
RD = 15
IMOD VCC VCC
IBIAS
RMOD
5k
RBIAS
5k
RPWC MODSET 2k VEE *VTT IS INTERNALLY CONNECTED TO VCC FOR MAX3932 VEE MODMON BIASSET VEE BIASMON
Figure 4. MAX3930/MAX3932 Functional Diagram
______________________________________________________________________________________
11
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
VCC VCC RTEN MODEN
MODN1
MODN2
MAX3931
50 CLK+ CLKD DATA+ DATA1 LB 50 VCC 50 Q 0 M U X PWC RMOD1 30 RMOD2 30 50 40 40 0.01F
5V
MOD1 IOUT MOD2
IMOD VCC VCC
IBIAS
RMOD
5k
RBIAS
5k
RPWC MODSET 2k VEE VEE MODMON BIASSET VEE BIASMON
Figure 5. MAX3931 Functional Diagram
12
______________________________________________________________________________________
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
VCC MODN1 VTT MOD1 MOD2 MODN2
40 50 DATA+ 50
40
DATA-
VEE VEE
Figure 6. MAX3930 Equivalent Input Circuit
Figure 7. MAX3930/MAX3932 Equivalent Output Circuit
VCC MODN1 MOD1 30 MOD2 30 MODN2
40 50 DATA+ 50
40
DATA-
VEE VEE
Figure 8. MAX3931/MAX3932 Equivalent Input Circuit
Figure 9. MAX3931 Equivalent Output Circuit
______________________________________________________________________________________
13
10.7Gbps Laser Diode Drivers MAX3930/MAX3931/MAX3932
Chip Topography
MAX3930
BIASMON VEE VEE VEE BIASSET N.C. VEE
31
MAX3931/MAX3932
BIASMON VEE VEE VEE BIASSET N.C. VEE
31
37 36 35 34 33 32
37 36 35 34 33 32
VCC DATA+
1 2 3 30
VCC BIAS DATA+
1 2 3 30
BIAS
29 28 27
VTT 4 DATAVCC CLK+ VTT CLKVCC VEE VEE VCC RTEN PWC+
5 6 7 8 9
29 28 27
VCC VCC MODN1
VCC 4 DATAVCC CLK+ VCC CLKVCC VCC VEE VCC RTEN PWC+
5 6 7 8 9
VCC VCC MODN1
26
MOD1 82mil
26
MOD1 82mil
25
25
10 11 12 13 14
MOD2
24 23
10 11 12 13 14
MOD2
24 23
MODN2 VCC
MODN2 VCC
22
VCC
22
VCC
15 16 17 18 19 20 21
15 16 17 18 19 20 21
PWC-
VEE VEE
MODEN
VEE MODSET MODMON
PWC-
VEE VEE VEE MODMON MODEN MODSET 46mil
46mil
Chip Information
TRANSISTOR COUNT: 1555 SUBSTRATE: SOI PROCESS: BiPOLAR SILICON GERMANIUM DIE THICKNESS: 8mil
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


▲Up To Search▲   

 
Price & Availability of MAX3930

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X